发明名称 SYSTEM AND METHOD UTILIZING REDUNDANCY IN SEMICONDUCTOR CHIP INTERCONNECTS
摘要 An integrated circuit, or combination of integrated circuits, has a primary interconnect, a redundant interconnect, and circuitry connecting the primary and redundant interconnects allowing selection of the redundant interconnect to bypass the primary interconnect.
申请公布号 WO2010030557(A1) 申请公布日期 2010.03.18
申请号 WO2009US55854 申请日期 2009.09.03
申请人 QUALCOMM INCORPORATED;LAISNE, MICHAEL;ARABI, KARIM;PETROV, TSVETOMIR 发明人 LAISNE, MICHAEL;ARABI, KARIM;PETROV, TSVETOMIR
分类号 H01L25/00 主分类号 H01L25/00
代理机构 代理人
主权项
地址