发明名称 INFORMATION PROCESSING DEVICE INCLUDING MEMORY MANAGEMENT DEVICE MANAGING ACCESS FROM PROCESSOR TO MEMORY AND MEMORY MANAGEMENT METHOD
摘要 <p>PURPOSE: An information processing device including a memory management device managing access from a processor to the memory and a memory management method are provided to reduce time required for the access and manufacture by deleting a layer having overhead from a memory layer. CONSTITUTION: A reception section receives a logical write address for a hybrid memory and write data from a processor. The hybrid memory comprises a first memory and a second non-volatile memory. An address determination section(19) determines a physical write address to make an access frequency to the second memory be lower than an access frequency to the first memory. An address management section(20) stores address conversion data related to wire logical address and wire physical address in a storage section.</p>
申请公布号 KR20100030602(A) 申请公布日期 2010.03.18
申请号 KR20090084986 申请日期 2009.09.09
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KUNIMATSU ATSUSHI;NAKAI HIROTO;SAKAMOTO HIROYUKI;MAEDA KENICHI;MIYAGAWA MASAKI;KAWAGOME KAZUHIRO;NOZUE HIROSHI
分类号 G06F12/02;G06F12/06;G06F12/08 主分类号 G06F12/02
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