发明名称 INTEGRATED CIRCUIT INCLUDING DOPED SEMICONDUCTOR LINE HAVING CONDUCTIVE CLADDING
摘要 An integrated circuit includes an array of memory cells. Each memory cell includes a diode. The integrated circuit includes a doped semiconductor line formed in a semiconductor substrate. The doped semiconductor line is coupled to a row of diodes. The integrated circuit includes conductive cladding contacting the doped semiconductor line.
申请公布号 US2010061140(A1) 申请公布日期 2010.03.11
申请号 US20080206439 申请日期 2008.09.08
申请人 QIMONDA AG 发明人 KLOSTERMANN ULRICH;GRUENING-VON SCHWERIN ULRIKE;KREUPL FRANZ
分类号 H01L45/00;G11C11/00;H01L21/20 主分类号 H01L45/00
代理机构 代理人
主权项
地址