发明名称 System and Method for Reducing Execution Divergence in Parallel Processing Architectures
摘要 A method for reducing execution divergence among a plurality of threads executable within a parallel processing architecture includes an operation of determining, among a plurality of data sets that function as operands for a plurality of different execution commands, a preferred execution type for the collective plurality of data sets. A data set is assigned from a data set pool to a thread which is to be executed by the parallel processing architecture, the assigned data set being of the preferred execution type, whereby the parallel processing architecture is operable to concurrently execute a plurality of threads, the plurality of concurrently executable threads including the thread having the assigned data set. An execution command for which the assigned data functions as an operand is applied to each of the plurality of threads.
申请公布号 US2010064291(A1) 申请公布日期 2010.03.11
申请号 US20080204974 申请日期 2008.09.05
申请人 NVIDIA CORPORATION 发明人 AILA TIMO;LAINE SAMULI;LUEBKE DAVID;GARLAND MICHAEL;HOBEROCK JARED
分类号 G06F9/46 主分类号 G06F9/46
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