| 摘要 |
PURPOSE: A method of manufacturing a gate pattern for a flash memory device are provided to prevent the loss of a liner insulating layer by preventing the loss of an isolation film. CONSTITUTION: A tunnel insulating layer(103) and a charge trapping layer(105) are laminated on an active region(A). The element isolation film(107) is formed on the semiconductor substrate(101). The element isolation film defines the active region. The dielectric film(109) is formed on the surface of the element isolation film and charge trapping layer. The control gate conductive layer and the gate hard mask pattern(115a) are laminated on the dielectric film. The control gate conductive layer is etched by using the gate hard mask pattern. The dielectric film is etched by using the gate hard mask pattern. The charge trapping layer is etched by using the gate hard mask pattern. The charge trapping layer is separated from a plurality of patterns.
|
