发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To suppress a charge and discharge current of a non-selection column and to secure read/write operation margin in low voltage operation. SOLUTION: In a semiconductor memory device having a plurality of memory cells 205 provided corresponding to cross points of a plurality of word lines (WLB<SB>k</SB>, WLB<SB>k+1</SB>) and a plurality of bit line pairs (D<SB>1</SB>, DB<SB>1</SB>, D<SB>l+1</SB>, DB<SB>l+1</SB>), column selecting lines (S<SB>1</SB>, S<SB>l+1</SB>) provided corresponding to respective bit lines are provided, a power source is supplied to respective memory cells 205 from the column selecting lines, word lines are connected to an input, an inverter (INV3) in which output is connected to a gate of an access transistor is provided, only the access transistor in which the word line and the column selecting line are selected simultaneously is turned on. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010049728(A) 申请公布日期 2010.03.04
申请号 JP20080211815 申请日期 2008.08.20
申请人 NEC ELECTRONICS CORP 发明人 UNO KAZUMASA
分类号 G11C11/412 主分类号 G11C11/412
代理机构 代理人
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