发明名称 |
Method for manufacturing a semiconductor memory device |
摘要 |
<p>A method for manufacturing a semiconductor memory device in which a bit line and a storage electrode of a capacitor are connected to an active area of a semiconductor substrate (101), respectively, via a contact pad (117a, 117b) formed in a self-aligning manner. The method includes the steps of forming a gate electrode (220) on a semiconductor substrate (200), the gate electrode (220) being covered with a spacer (222). Then, a planarized first interlayer dielectric ILD (230) film is formed on the semiconductor substrate (200) having the gate electrode (220) before a second ILD (240) film is formed on the first ILD (230) film and a remaining preventing layer (245) is formed on the second ILD (240) film. Then, the remaining preventing layer (245), the second ILD (240) film and the first ILD film are patterned in sequence to form a landing pad hole which simultaneously exposes an active region of the semiconductor substrate and a part of the spacer (222) in a cell array region. A landing pad (260) is formed in the landing pad hole.
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申请公布号 |
EP1684342(A3) |
申请公布日期 |
2010.03.03 |
申请号 |
EP20060075802 |
申请日期 |
1997.10.29 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
BAN, HYO-DONG;CHOE, HYUN-CHEOL;CHOI, CHANG-SIK |
分类号 |
H01L21/28;H01L21/8242;H01L21/768;H01L27/105;H01L27/108 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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