| 摘要 |
A field effect transistor (FET) device includes a bulk substrate, a gate insulating layer formed over the bulk substrate, source and drain regions formed in an active device area associated with the bulk substrate, the source and drain regions each defining a p/n junction with respect to a body region of the active device area, and a conductive plug formed within a cavity defined in the source region, across the p/n junction of the source region and into the body region, wherein the conductive plug facilitates a discharge path between the body region and the source region.
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