发明名称 Structure and method for fabrication JFET in CMOS
摘要 A design structure, and more particularly, to a design structure for manufacturing a JFET in SOI, a JFET and methods of manufacturing the JFET are provided. The JFET includes a gate poly formed directly on an SOI layer and a gate oxide layer interposed between outer edges of the gate poly and the SOI layer.
申请公布号 US7670889(B2) 申请公布日期 2010.03.02
申请号 US20080132638 申请日期 2008.06.04
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 PEKARIK JOHN J.;PHELPS RICHARD A.;RASSEL ROBERT M.;SHI YUN
分类号 H01L21/337;H01L21/84 主分类号 H01L21/337
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