| 摘要 |
For on-chip testing an on-chip power switch coupled to a core logic and to a decoupling capacitance, after the power switch enters a test mode, the decoupling capacitance is pre-charged or discharged; the power switch is turned ON or OFF according to test patterns; and a voltage level at the decoupling capacitance is analyzed or a leakage current flowing the power switch is measured. So that, whether the power switch is passed or failed is identified.
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