发明名称 ASYNCHRONOUS SIGMA-DELTA DIGITAL-ANALOG CONVERTER
摘要 An asynchronous sigma delta digital to analog converter for converting a digital input signal into an analog output signal, the digital to analog converter having an asynchronous sigma delta modulator having a low pass filter and a comparator and being supplied with the digital input signal, and a clock sample unit adapted to sample a signal processed by the comparator based on a clock signal, thereby generating the analog output signal.
申请公布号 US2010045499(A1) 申请公布日期 2010.02.25
申请号 US20090376121 申请日期 2009.11.04
申请人 VERIGY (SINGAPORE) PTE. LTD. 发明人 RIVOIR JOCHEN
分类号 H03M3/00 主分类号 H03M3/00
代理机构 代理人
主权项
地址