发明名称 Dual-ported and-type match-line circuit for content-addressable memories
摘要 A dual-ported AND-type match-line circuit includes at least one dual-ported dynamic AND gate. The dual-ported dynamic AND gate includes a group of CAM cells and a dual-ported dynamic circuit. A group of CAM cells connected to a dual-ported dynamic circuit and to the GND. The dual-ported dynamic circuit is connected to a group of CAM cells. The dual-ported dynamic circuit includes a setting circuit, a first directing circuit, a second directing circuit, a first AND dynamic output circuit and a second AND dynamic output circuit.
申请公布号 US7667993(B2) 申请公布日期 2010.02.23
申请号 US20070907524 申请日期 2007.10.12
申请人 NATIONAL CHUNG CHENG UNIVERSITY 发明人 WANG CHAO-CHING;CHENG CHIEH-JEN;WANG JINN-SHYAN;CHEN TIEN-FU
分类号 G11C15/00 主分类号 G11C15/00
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