发明名称 REDUNDANCY CONTROL CIRCUIT IN SEMICONDUCTOR MEMORY APPARATUS
摘要 PURPOSE: A redundancy control circuit in a semiconductor memory apparatus is provided to process a stable redundancy operation by compartmentalizing two memory banks and supporting the redundancy operation. CONSTITUTION: A first enable unit(2111) operates in response to a power up signal. A first enable unit generates a first fuse enable signal according to the cutting of a fuse inside. A second enable unit(2113) operates in response to a power up signal. A second enable unit generates a second fuse enable signal according to the cutting of the fuse inside. A redundancy address generating unit(2115) generates the redundancy address according to each cutting of the fuse when the first or second fuse enable signal is enabled. A first block redundancy control unit(2117) generates the first block redundancy enable signal in response to the first fuse enable signal. A second block redundancy control unit(2119) generates the second block redundancy enable signal in response to the second fuse enable signal.
申请公布号 KR20100019851(A) 申请公布日期 2010.02.19
申请号 KR20080078590 申请日期 2008.08.11
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHOI, WON JUN;KIM, KWAN WEON
分类号 G11C29/04;G11C8/04 主分类号 G11C29/04
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