| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit having a power wiring structure improving wiring efficiency by reducing congestion of wiring. Ž<P>SOLUTION: Between a main power wiring layer and an intermediate power wiring layer, a first intermediate connection via connecting first main power wiring to first intermediate power wiring is formed at a position overlapping the first main power wiring, and a second intermediate connection via connecting second main power wiring to second intermediate power wiring is formed at a position overlapping the second main power wiring. Between the intermediate power wiring layer and an auxiliary power wiring layer, a plurality of first auxiliary connection vias connecting the first intermediate power wiring to first auxiliary power wiring and a plurality of second connection vias connecting the second intermediate power wiring to second auxiliary power wiring are arranged in the first direction, and a plurality of auxiliary connection via lines are arranged in the second direction. The second intermediate power wiring of the intermediate power wiring layer includes connection wiring connecting the second intermediate connection vias to the second auxiliary connection vias. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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