发明名称 DUAL GATE LDMOS DEVICES
摘要 An embodiment of an N-channel device has a lightly doped substrate in which adjacent or spaced-apart P and N wells are provided. A lateral isolation wall surrounds at least a portion of the substrate and is spaced apart from the wells. A first gate overlies the P well or the substrate between the wells or partly both. A second gate, spaced apart from the first gate, overlies the N-well. A body contact to the substrate is spaced apart from the isolation wall by a first distance within the space charge region of the substrate to isolation wall PN junction. When the body contact is connected to the second gate, a predetermined static bias Vg2 is provided to the second gate, depending upon the isolation wall bias (Vbias) and the first distance.
申请公布号 US2010025765(A1) 申请公布日期 2010.02.04
申请号 US20090560588 申请日期 2009.09.16
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 YANG HONGNING;MACARY VERONIQUE C.;MIN WON GI;ZUO JIANG-KAI
分类号 H01L29/78 主分类号 H01L29/78
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