| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a structure for detecting a via defect caused by thermal hysteresis after forming a multilayer wiring. Ž<P>SOLUTION: The structure includes: a first wiring on a semiconductor substrate; a second wiring positioned above the first wiring; a via chain (15) comprising a first via which electrically connects the first wiring and the second wiring; an inspection region (C) connected to one end side of the via chain; and a contact region (B) electrically connecting the via chain with the semiconductor substrate. The inspection region includes: a multilayer extracted wiring in which extraction wirings (22C, 23C, 24C) extracted from one end side of the via chain while being larger than the first wiring, are laminated up to a layer upper than the second wiring of the via chain; and extracted wiring vias (32, 33) which connect the multilayer extraction wirings between respective layers. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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