CLOCK RECOVERY LOOP USING SAMPLE-PATTERN BASED FREQUENCY ERROR DETECTION

摘要

PURPOSE: A clock recovery loop using sample pattern based frequency error detection is provided to prevent a leakage current of the clock recovery clock previously by comprising a frequency detector with a digital circuit. CONSTITUTION: A clock recovery loop(100) includes a sampling unit(110), an oscillation control unit(120) and a voltage controlled oscillator(130). The sampling unit samples the output clock from the voltage controlled oscillator in a rising edge and a falling edge of the input data using the input data. The oscillation control unit detects the frequency deference between the clock frequency and the input data frequency. The oscillation control unit generates the oscillation control signal about the voltage controlled oscillator using the frequency difference. The voltage controlled oscillator includes a frequency of 1/n of the input data frequency. The voltage controlled oscillator generates n clocks with the phase difference of the 360/n degrees.