发明名称 PHASE-LOCKED LOOP CIRCUITS AND METHODS IMPLEMENTING PULSEWIDTH MODULATION FOR FINE TUNING CONTROL OF DIGITALLY CONTROLLED OSCILLATORS
摘要 PLL (phase locked loop) circuits and methods are provided in which PWM (pulse width modulation) techniques are to achieve continuous fine tuning control of DCO (digitally controlled oscillator) circuits. In general, pulse width modulation techniques are applied to further modulate dithered control signals that are used to enhance the frequency tuning resolution of the DCO such that the dithered control signals are applied to the fractional tracking control port of the DCO for a selected fraction of a full clock signal based pulse width modulation applied.
申请公布号 US2010013531(A1) 申请公布日期 2010.01.21
申请号 US20080173140 申请日期 2008.07.15
申请人 AINSPAN HERSCHEL A;FRIEDMAN DANIEL J;RYLYAKOV ALEXANDER V;TIERNO JOSE A 发明人 AINSPAN HERSCHEL A.;FRIEDMAN DANIEL J.;RYLYAKOV ALEXANDER V.;TIERNO JOSE A.
分类号 H03L7/06 主分类号 H03L7/06
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