| 摘要 |
PURPOSE: A semiconductor memory device is provided to improve an active speed and an equalizing speed with minimum power consumption using a power voltage and a pumping voltage for an active period of a bit line equalizing signal stepwise. CONSTITUTION: A bit line equalizing signal generator(130) drives an output terminal with a first power voltage in a first active period. An equalizing signal generator drives the output terminal with a second power voltage higher than the first power voltage in a second active period. A bit line equalizing unit(120) equalizes a bit line pair in response to the bit line equalizing signal.
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