发明名称 |
MECHANISMS TO HANDLE FREE PHYSICAL REGISTER IDENTIFIERS FOR SMT OUT-OF-ORDER PROCESSORS |
摘要 |
Methods and apparatus relating to mechanisms to handle free physical register identifiers for SMT (Simultaneous Multi-Threading) out-of-order processors are described. In some embodiments, a physical register file stores both speculative data and architectural data corresponding to a plurality of registers. A free list logic may maintain free physical register identifiers corresponding to the plurality of registers. An instruction may read the architectural data from the physical register file at dispatch. Other embodiments are also described and claimed.
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申请公布号 |
US2009327661(A1) |
申请公布日期 |
2009.12.31 |
申请号 |
US20080165186 |
申请日期 |
2008.06.30 |
申请人 |
SPERBER ZEEV;SAGER DAVID J;LATORRE FERNANDO;LEMPEL ORI;KRIMER EVGENI;SHOMAR BISHARA |
发明人 |
SPERBER ZEEV;SAGER DAVID J.;LATORRE FERNANDO;LEMPEL ORI;KRIMER EVGENI;SHOMAR BISHARA |
分类号 |
G06F9/305 |
主分类号 |
G06F9/305 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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