| 摘要 |
A method and/or a system of at-speed transition fault testing with low speed scan enable is disclosed. In one embodiment, a digital system includes any number of scan chains. Each scan chain may have any number of scan cells, an at-speed local scan enable signal to control a mode of operation, and any number of last transition generator cells. In addition, each last transition generator cell includes a first flip-flop with an output connected to a second flip-flop input, an input multiplexer to apply any one of a first flip-flop output data and an OR gate having a first flip-flop input based on a state of the at-speed local scan enable signal, and an OR gate having a first flip-flop output and the global scan enable signal as inputs to generate the at-speed local scan enable signal based on a state of the global scan enable signal.
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