| 摘要 |
A memory array comprising a plurality of rows and a plurality of columns, each row comprising at least one addressable word, said memory array comprising at least one redundant row and at least one redundant column; error detection circuitry for analysing said memory array, by addressing words within said memory array and detecting errors within said addressed words; error repair circuitry for selecting for a detected error either a redundant row or a redundant column to replace one of said row or column containing said error; wherein said error repair circuitry is configured to determine for said detected error whether said error is a single error bit in said addressed word or whether it is one of a plurality of error bits within said word, and if said error is said one of said plurality of errors, said error repair circuitry is configured to preferentially select a redundant row rather than a redundant column to repair said error.
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