| 摘要 |
<P>PROBLEM TO BE SOLVED: To disclose a semiconductor device that includes an adaptive phase-locked loop with improved loop stability and a faster locking rate. <P>SOLUTION: In one embodiment, this is accomplished in a manner that does not require a second charge pump for loop stability, and resultantly the phase-locked loop consumes less chip die area. In another embodiment, multiple charge pumps are used and the improved response time for locking can be achieved compared with conventional embodiments. <P>COPYRIGHT: (C)2010,JPO&INPIT |
