发明名称 SAMPLING CLOCK GENERATING CIRCUIT IN CHARACTER MULTIPLEX BROADCAST RECEIVER
摘要 PURPOSE:To eliminate the need for the readjustment against a phase fluctuation caused by environmental changes and the initial adjustment and to keep on optimum state, by detecting the phase difference between a character signal and a sampling clock and adjusting the phase of the sampling clock in response to the detected phase difference. CONSTITUTION:A mutliplex character signal is extracted from a video signal with a character signal extracting means 11 and applied to an S-P converting circuit 6, and also to a synchronizing pulse generating circuit 3, a phase comparator 4 and a phase adjusting means 5. Further, a sampling clock generating means 2 counts down a high frequency signal to generate a sampling pulse, and a load signal 31 synchronized with the character signal at the circuit 3 is applied to the means 2. Further, the phase difference between the sampling clock 23 and the character signal is detected at a comparator 4, an output signal corresponding to this phase difference is converted into a digital number at the means 5 at each field, the number is applied to the means 2 as an adjusting signal so as to make the phase of the character signal and the sampling clock 23 coincident with each other.
申请公布号 JPS58204686(A) 申请公布日期 1983.11.29
申请号 JP19820086828 申请日期 1982.05.21
申请人 SHARP KK 发明人 TAKEMURA KINYA;FUKUZAKI KAZUHIRO;NISHIDA NAOKI;INOOKA TOSHIHIRO;TANI MASAHIKO
分类号 H04N7/025;H04N7/03;H04N7/035 主分类号 H04N7/025
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