| 摘要 |
<p>PURPOSE:To detect accurately a synchronizing signal by judging whether or not both the 1st and 2nd synchronizing patterns inserted to the tip and the final part of a burst data coexist. CONSTITUTION:In detecting the 1st synchronizing pattern, a synchronizing pattern detection circuit 23 outputs a synchronizing detection pulse SDP. After a prescribed time from the said SDP output, a gate generating circuit 25 outputs the 2nd synchronizing pattern detection gate signal GP1. When the 1st and 2nd synchronizing patterns are both detected, the 1st counter 41 is advanced stepwise and outputs a pulse when the value reaches a prescribed value. In receiving the pulse, the frame control circuit 27 judges it as the establishment of synchronization. On the other hand, when either the 1st or the 2nd pattern is not detected, the 2nd counter 43 is advanced and outputs a pulse when the value reaches a prescribed value. In receiving the said pulse, the frame control circuit 27 commands the re-pull in of the frame synchronization.</p> |
