发明名称 Packet processor that generates packet-start offsets to immediately store incoming streamed packets using parallel, staggered round-robin arbitration to interleaved banks of memory
摘要 A shared memory stores packets for a packet processor. The shared memory is arranged into banks that are word-interleaved. All banks may be accessed in parallel during each time-slot by different requesters. A staggered round-robin arbiter connects requesters to banks in a parallel fashion. Requestor inputs to the arbiter are staggered to allow access to different banks in a sequential order over successive time-slots. Multi-processor tribes have many processors that generate random requests to the shared memory. A slot scheduler arranges these random requests into a stream of sequential requests that are synchronized to the staggered round-robin arbiter. A packet interface requestor stores incoming packets from an external network into the shared memory. The packet's offset within pages of the shared memory is determined by the first available bank that the packet can be written to, eliminating delays in storing incoming packets and spreading storage of frequently-accessed fields.
申请公布号 US7634622(B1) 申请公布日期 2009.12.15
申请号 US20060309662 申请日期 2006.09.07
申请人 CONSENTRY NETWORKS, INC. 发明人 MUSOLL ENRIQUE;NEMIROVSKY MARIO;HUYNH JEFFREY
分类号 G06F12/00;G06F13/00;G06F13/28 主分类号 G06F12/00
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