| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve reading stability and writing performance without greatly interfering with the demands to increase the integration density. Ž<P>SOLUTION: The semiconductor memory device is provided with a memory cell array which includes a plurality of blocks having a plurality of columns and a plurality of rows, a column selection circuit, a word line driver circuit for selecting a row based on a row selection signal and a column selection signal, and a writing/reading circuit disposed in a position determined by one column selected by the column selection circuit in one block and one row selected by the word line driver circuit to write data in one selected memory cell and read data from the selected memory cell via the bit line based on a write/read switching signal. In the rows corresponding to the plurality of blocks, the number of word lines equal to that of the plurality of columns are commonly disposed, and memory cells disposed in one row in one block are connected to different word lines. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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