发明名称 System and Method for Virtualizing Processor and Interrupt Priorities
摘要 Dispatching of interrupts to a processor is conditionally suppressed, that is, only if an old priority value and a new priority value are either both less than or both greater than a maximum pending priority value. This conditional avoidance of dispatching is preferably implemented by a virtual priority module within a binary translator in a virtualized computer system and relates to interrupts directed to a virtualized processor by a virtualized local APIC.
申请公布号 US2009300250(A1) 申请公布日期 2009.12.03
申请号 US20090541783 申请日期 2009.08.14
申请人 VMWARE, INC. 发明人 WEISSMAN BORIS
分类号 G06F13/24 主分类号 G06F13/24
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