发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To reduce the power consumption of a scanned semiconductor integrated circuit generated, when a test enable signal is disabled. Ž<P>SOLUTION: The semiconductor integrated circuit 50 comprises a scan cell 1a; a scan cell 1b; a logic circuit 2; and a scan output signal cut-off means 3. The scan output signal cut-off means 3 is provided between the scan cell 1a and the scan cell 1b, and a buffer BUFF1 and an Nch insulated gate type field effect transistor NT1 are provided. The absolute value of the threshold voltage of the Nch insulated gate type field effect transistor NT1 is higher than that of the threshold voltage of a transistor that constitutes the buffer BUFF1. When a test-enable signal TE is disabled, the Nch insulated gate type field effect transistor NT1 is turned off; the output of the buffer BUFF1 reaches high impedance; and the scan output signal shut-off means 3 statically shuts off a scan output signal SO. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2009276181(A) 申请公布日期 2009.11.26
申请号 JP20080127122 申请日期 2008.05.14
申请人 TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP 发明人 UCHIDA KAZUYUKI
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
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