发明名称 Semiconductor memory device operating a self refreshing and an auto refreshing
摘要 An oscillating period of an oscillator is configured to be adjustable by CODEi output from a ROM circuit, and a circuit is configured so that the oscillating period is equal to a period p times a tRAS period during self refreshing. An n-bit counter counts up based on the output of the oscillator. A programmable decoder issues a reset to the n-bit counter in a period equal to q times the oscillating period based on a count of the n-bit counter and CODEj output from the ROM circuit. Each time the programmable decoder issues the reset, an RASB signal is activated by controlling SRACT at H-level for a period equal to 1/p times the period of OSC0.
申请公布号 US7623402(B2) 申请公布日期 2009.11.24
申请号 US20070965102 申请日期 2007.12.27
申请人 ELPIDA MEMORY, INC. 发明人 MOCHIDA YOSHIFUMI
分类号 G11C7/00 主分类号 G11C7/00
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