AND TYPE FLASH MEMORY ARRAY HAVING VERTICALLY STACKED STRUCTURE AND MANUFACTURING METHOD AND OPERATING METHOD OF THE SAME

摘要

PURPOSE: An AND type flash memory array of a vertical laminate structure, a manufacturing method thereof, and an operating method are provided to perform high integration by forming a local bit line and a local source line in a silicon pin of each layer. CONSTITUTION: An AND type flash memory array of a vertical laminate structure includes one or more bit lines, a local bit line, a memory cell, a local source line, a common source line, a drain selecting line, a source selecting line, and word lines. The local bit line is connected to each bit line(98a,98b,98c) by a first selecting transistor. A plurality of memory cells are parallel connected by using the local bit line as a common drain line. The local source line is commonly connected to a source of each memory cell. The common source line is vertically arranged with each bit line in which the local source line is connected by a second selecting transistor. The drain selecting line and the source selecting line are connected to a gate of the first selecting transistor and a gate of the second selecting transistor. The word lines are connected to a gate of each memory cell.