发明名称 SEMICONDUCTOR DEVICE
摘要 The semiconductor device 100 comprises a first semiconductor element 113 provided on a face on one side of a flat plate shaped interconnect component 101, an insulating resin 119 covering a face of a side where the first semiconductor element 113 of the interconnect component 101 is provided and a side face of the first semiconductor element 113, and a second semiconductor element 111 provided on a face on the other side of the interconnect component 101. The interconnect component 101 has a constitution where an interconnect layer 103, a silicon layer 105 and an insulating film 107 are sequentially formed. The interconnect layer 103 has a constitution where the interconnect layer 103 has a flat plate shaped insulating component and a conductive component extending through the insulating component. The first semiconductor element 113 is electrically connected with the second semiconductor element 111 through the conductive component.
申请公布号 US2016204092(A1) 申请公布日期 2016.07.14
申请号 US201615072803 申请日期 2016.03.17
申请人 Renesas Electronics Corporation 发明人 KURITA Yoichiro
分类号 H01L25/18;H01L25/065;H01L23/538 主分类号 H01L25/18
代理机构 代理人
主权项 1. A semiconductor device comprising: a wiring member having a first surface, a second surface opposite the first surface, a silicon layer formed between the first and second surface, a plurality of wirings formed on the silicon layer, a first through electrode penetrating the silicon layer, and a first external electrode being arranged on the second surface; and a first semiconductor chip having a first main surface on which a first electrode is formed and being mounted on the first surface of the wiring member such that the first main surface of the first semiconductor chip faces the first surface of the wiring member, wherein one end portion of the first through electrode of the silicon layer is electrically connected with the first electrode of the first semiconductor chip, wherein the other end portion of the first through electrode of the silicon layer is electrically connected with the first external electrode of the wiring member, and wherein a passive element is formed on the silicon layer and is electrically connected with the wirings on the silicon layer.
地址 Tokyo JP