发明名称 Double-masking technique for increasing fabrication yield in superconducting electronics
摘要 A new technique is presented for improving the microfabrication yield of Josephson junctions in superconducting integrated circuits. This is based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so as to a) maximize adhesion between the resist and the underlying superconducting layer, b) be etch-compatible with the underlying superconducting layer, and c) be insoluble in the resist and anodization processing chemistries. In a preferred embodiment of the invention, the superconductor is niobium, the material on top of this is silicon dioxide, and the top layer is conventional photoresist or electron-beam resist. The use of this combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits due to increase in junction uniformity and reduction in defect density. An additional improvement over the prior art involves the replacement of a wet-etch step with a dry etch more compatible with microlithography.
申请公布号 US7615385(B2) 申请公布日期 2009.11.10
申请号 US20060616382 申请日期 2006.12.27
申请人 HYPRES, INC 发明人 TOLPYGO SERGEY K.
分类号 H01L21/00 主分类号 H01L21/00
代理机构 代理人
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