| 摘要 |
In a microprocessor for pipeline processing instruction execution, dependency relationship information representing a dependency relationship of each of a plurality of instructions with all the preceding instructions is stored, and whether or not the instructions in stages after instruction issue depend on the instruction of a miss speculation is judged based on the dependency relationship information if the miss speculation occurs during the execution of the plurality of instructions in accordance with a set schedule. Thus, this microprocessor can perform a recovery processing for invalidating only the instructions in a dependency relationship at once in the case of a miss speculation in speculative scheduling.
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