发明名称 Method to implement metal fill during integrated circuit design and layout
摘要 Embodiments of the present invention provide a system and method with which to implement metal fill during design using tools such as a place and route tools or layout tools. Unlike prior known solutions where metal fill was performed after design and layout, performing metal fill during layout with a uniform pattern of conductive traces sized and spaced according to the design rules of the device to be fabricated resulting in more planning and design. Dividing the conductive traces into active and inactive segments during the design and layout identifies potentially negative impacts on critical or sensitive device elements within the device during design and layout. Previously, metal fill was implemented after design and layout and often resulted in negative impacts not previously accounted for during IC design. Embodiments of the present invention reduce degradation, seen in other devices where metal fill is incorporated after design and layout. Additionally, because the physical characteristics of inactive metal fill segments are considered during design and layout of the ICs.
申请公布号 US7614024(B2) 申请公布日期 2009.11.03
申请号 US20050244514 申请日期 2005.10.06
申请人 BROADCOM CORPORATION 发明人 BOTHRA SUBHAS
分类号 G06F17/50 主分类号 G06F17/50
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