发明名称 LAYOUT STRUCTURE OF STANDARD CELL, STANDARD CELL LIBRARY, AND LAYOUT STRUCTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>The layout structure of a standard cell which are provided with off transistors (126, 127) which are not necessary in terms of logic operation of a circuit. In impurity diffused areas (103, 106) of the respective off transistors (126, 127), dummy via contacts (116, 117) are arranged. To the respective dummy via contacts (116, 117), dummy metal wirings (122, 123) are connected. Consequently, coarse density of via contacts being one of the main causes of deterioration in the fabrication yield of the semiconductor integrated circuit is saved to improve defective fabrication of the via contacts.</p>
申请公布号 WO2009130844(A1) 申请公布日期 2009.10.29
申请号 WO2009JP01188 申请日期 2009.03.17
申请人 PANASONIC CORPORATION;OKAMOTO, NANA;TAMARU, MASAKI;NISHIMURA, HIDETOSHI 发明人 OKAMOTO, NANA;TAMARU, MASAKI;NISHIMURA, HIDETOSHI
分类号 H01L21/82 主分类号 H01L21/82
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