| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a technology for achieving size reduction, particularly pitch narrowing, in a semiconductor device. <P>SOLUTION: This semiconductor device includes a pad 2 provided on a semiconductor chip 1C, a passivation film 3 formed over the semiconductor chip 1C and having an opening portion 11 on the pad 2 of a probe region 10A and a connection region 10B, a passivation film 5 formed over the pad 2 and the passivation film 3 and having an opening portion 12 on the pad 2 of the connection region 10B, and a rewiring 7 formed over the connection region 10B and the passivation film 5 and electrically connected to the pad 2. The pad 2 of the probe region 10A placed on the periphery side of the semiconductor chip 1C relative to the connection region 10B includes a probe mark 100, and the rewiring 7 extends from the connection region 10B to the center side of the semiconductor chip 1C. <P>COPYRIGHT: (C)2010,JPO&INPIT |
