发明名称 Packet buffer management
摘要 <p>The packet forwarding apparatus of the present invention includes a packet buffer 6 for temporarily storing packets to be forwarded, and a buffer manager 5 comprising a timer 40 for measuring the time of every predetermined unit period, pointer storage 30 comprising a plurality of first queues corresponding to each of a plurality of address groups that form the packet buffer and a plurality of second queues that are provided corresponding to the property of the packets, a first controller 10 (write controller) for executing the writing of the packets, and a second controller 20 (read controller) for executing the discarding of the packets, a delay threshold memory table 22 and a write management table 50. According to this invention, through managing the first queues and the second queues, packets in the packet buffer can be discarded without the packets being read from the packet buffer, such packets being discarded without being read if the residence period (that is the period of time since they were written into the buffer to the current time) of the packet(s) is above a threshold set in the delay threshold memory table.</p>
申请公布号 GB2459168(A) 申请公布日期 2009.10.21
申请号 GB20090001569 申请日期 2009.02.02
申请人 FUJITSU LIMITED 发明人 AKIHIRO HATA;HIROSHI TOMONAGA;KATSUMI IMAMURA
分类号 H04L12/931;H04L12/70;H04L12/823;H04L12/875 主分类号 H04L12/931
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