发明名称 DRIVER CIRCUIT, AND METHOD OF CONTROLLING RISING VOLTAGE AND FALLING VOLTAGE
摘要 <P>PROBLEM TO BE SOLVED: To prevent large overshoots and undershoots. Ž<P>SOLUTION: The driver circuit includes: (1) a first CMOS circuit and a second CMOS circuit connected in parallel; and (2) a control part for conducting a first P-type FET and a second P-type FET before a driving voltage reaches the first threshold of the control part (2Aa) and conducting only the second P type FET after the driving voltage reaches the first threshold of the control part (2Ab) when an input voltage is switched from a first voltage to a second voltage (2A), and conducting a first N-type FET and a second N-type FET before the driving voltaeg reaches the second threshold of the control part (2Ba) and conducting only the second N-type FET after the driving voltage reaches the second threshold of the control part (2Bb) when the input voltage is switched from the second voltage to the first voltage (2B). Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2009239416(A) 申请公布日期 2009.10.15
申请号 JP20080079952 申请日期 2008.03.26
申请人 SEIKO EPSON CORP 发明人 KOBAYASHI SHINICHIRO
分类号 H03K19/0175 主分类号 H03K19/0175
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