| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a reliable semiconductor storage device in which the influence of a performance deterioration factor of a memory cell is suppressed. <P>SOLUTION: The semiconductor storage device includes: a memory cell array 1 having a plurality of memory cells MC which are arranged at respective crossing parts of word lines WL and bit lines BL, respective one ends of which are connected to the word lines and the other ends are connected to the bit lines; a read/write circuit 2 for reading/writing data from/to the memory cells MC; and an arithmetic circuit 3 for comparing and determining the data of predetermined length read from the memory cells MC and the data of predetermined length to be written into the memory cells MC and creating a flag for showing the determination results. By the read/write circuit 2, when the data are written, each bit of the data of predetermined length to be written into the memory cells is inverted according to the flag and only data to be rewritten among the data of predetermined length and the flag are written into the memory cells, and when the data are read, the data of predetermined length and the corresponding flag are read and each bit of the data predetermined length is inverted and output according to the flag. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
