发明名称 REDUCTION OF LATENCY IN STORE AND FORWARD ARCHITECTURES UTILIZING MULTIPLE INTERNAL BUS PROTOCOLS
摘要 Disclosed is a store and forward device that reduces latency. The store and forward device allows front end devices having various transfer protocols to be connected in a single path through a RAM, while reducing latency. Front end devices that transfer data on a piecemeal basis are required to transfer all of the data to a RAM prior to downloading data to a back end. Front end devices that transfer data in a single download begin the transfer of data out of a RAM as soon as a threshold value is reached. Hence, the latency associated with downloading all of the data into a RAM 118 and then transferring all of the data out of the RAM is eliminated.
申请公布号 US2009248968(A1) 申请公布日期 2009.10.01
申请号 US20080058984 申请日期 2008.03.31
申请人 UDELL JOHN;WHITT JEFFREY K 发明人 UDELL JOHN;WHITT JEFFREY K.
分类号 G06F12/00 主分类号 G06F12/00
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