| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce on-resistance between a source and a drain in a semiconductor device having an E-FET and a D-FET integrated on an identical substrate. Ž<P>SOLUTION: In the semiconductor device 1 having the E-FET and the D-FET integrated on the identical semiconductor substrate 10, a plurality of epitaxial layers 11 include a first threshold adjusting layer 115 for adjusting threshold voltages of the E-FET and the D-FET, a first etching stop layer 116 for selectively stopping the etching of layers of the uppermost one to the upper one contacting therewith, a second threshold adjusting layer 117 for adjusting a threshold voltage of the gate of the D-FET, and a second etching stop layer 118 for selectively stopping the etching of layers of the uppermost one to the upper one contacting therewith sequentially from the side of the semiconductor substrate 10. At least one of the first etching stop layer 116 and the second threshold adjusting layer 117 includes an n-doped region. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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