发明名称 MEMORY DEVICE WITH VERTICAL CHANNEL AND DOUBLE SPLIT GATES
摘要 <p>PURPOSE: A memory device with vertical channel and double split gates is provided to reduce the area per the unit cell. CONSTITUTION: The memory device with vertical channel and double split gates includes two Si-fins(11,12), the first and the second source/drain regions(51,52), the first and second select gates(31,32), the control gate(80), and the third source/drain region(60). Two Si-fins are formed between the trenches. The first and the second source/drain regions are formed in the upper part of each Si-fin. The first and the second selection gate are formed on the silicon. The control gate is formed by filling the trench. The third source/drain regions are formed at the floor of the trench.</p>
申请公布号 KR20090100799(A) 申请公布日期 2009.09.24
申请号 KR20080026239 申请日期 2008.03.21
申请人 SEOUL NATIONAL UNIVERSITY INDUSTRY FOUNDATION 发明人 PARK, BYUNG GOOK;YUN, JANG GN
分类号 H01L21/8247;H01L27/115 主分类号 H01L21/8247
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