发明名称 METHOD, COMPUTER PROGRAM PRODUCT, AND HARDWARE PRODUCT FOR ELIMINATING OR REDUCING OPERAND LINE CROSSING PENALTY
摘要 Eliminating or reducing an operand line crossing penalty by performing an initial fetch for an operand from a data cache of a processor. The initial fetch is performed by allowing or permitting the initial fetch to occur unaligned with reference to a quadword boundary. A plurality of subsequent fetches for a corresponding plurality of operands from the data cache are performed wherein each of the plurality of subsequent fetches is aligned to any of a plurality of quadword boundaries to prevent each of a plurality of individual fetch requests from spanning a plurality of lines in the data cache. A steady stream of data is maintained by placing an operand buffer at an output of the data cache to store and merge data from the initial fetch and the plurality of subsequent fetches, and to return the stored and merged data to the processor.
申请公布号 US2009240918(A1) 申请公布日期 2009.09.24
申请号 US20080051296 申请日期 2008.03.19
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KAPADIA VIMAL M.;BUSABA FADI Y.;MALLEY EDWARD T.;RELL, JR. JOHN G.;SHUM CHUNG-LUNG KEVIN
分类号 G06F9/30 主分类号 G06F9/30
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