DC COMPENSATION FOR VLIF SIGNALS

摘要

Receiver circuitry (300) for processing a received Very Low Intermediate Frequency (VLIF) signal wherein the receiver circuitry (300) comprises a main processing path (325). The main processing path (325) comprises mixing circuitry (330) arranged to mix a received VLIF signal with a frequency down conversion signal to produce a main path signal. The receiver circuitry (300) further comprises a direct current (DC) cancellation path (350) comprising mixing circuitry (360) arranged to mix a DC element of the received VLIF signal with the frequency down conversion signal to produce a DC cancellation signal. The receiver circuitry still further comprises signal summing circuitry (365) arranged to add the DC cancellation signal in antiphase with the main path signal.