发明名称 METHOD FOR FABRICATING THROUGH-SUBSTRATE VIAS
摘要 A method for fabricating through substrate vias (75) is presented, whereby vias are etched from the backside of the substrate (5) down to STI (14) or the PMD (13). Extra contacts (50) between metal 1 contact pads (55) and the through-wafer 5 vias (75) are fabricated for realising the contact between the through wafer vias (75) and the back-end-of-line (3) of the semiconductor chips (11).
申请公布号 WO2009115449(A1) 申请公布日期 2009.09.24
申请号 WO2009EP52922 申请日期 2009.03.12
申请人 INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW (IMEC);SABUNCUOGLU TEZCAN, DENIZ;CIVALE, YANN;SWINNEN, BART;BEYNE, ERIC 发明人 SABUNCUOGLU TEZCAN, DENIZ;CIVALE, YANN;SWINNEN, BART;BEYNE, ERIC
分类号 H01L21/768;H01L23/48 主分类号 H01L21/768
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