发明名称 MEMORY SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a memory system for securing fixed latency for data write-in processing from a host device to a flash memory. SOLUTION: When a Write request is made from a host device 1, a processor 104 writes data from the host device 1 in a WC 21, and when a prescribed condition is satisfied, the data of the WC21 are discharged into a NAND memory 10, and when a read request is made form the host device 1, data whose readout request has been made are read from the NAND memory 10 to an RC 22, and transferred to the host device 1, and when a Write_FUA request is received from the host device 1, the data designated by the Write_FUA request are written from the host device 1 to the RC 22, and the data written in the RC22 are written in the NAND memory 10. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009211222(A) 申请公布日期 2009.09.17
申请号 JP20080051467 申请日期 2008.03.01
申请人 TOSHIBA CORP 发明人 YANO JUNJI;MATSUZAKI HIDENORI;HATSUDA KOSUKE
分类号 G06F3/08;G06F12/08 主分类号 G06F3/08
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