发明名称 Apparatus and method for Viterbi decoding
摘要 A Viterbi decoding apparatus and a method thereof are disclosed. According to each partial surviving path formed by the decision information of every k continuous symbols of a symbol sequence, the apparatus can write its start trellis state and corresponding partial decoded information into a memory unit. On the other hand, the apparatus performs traceback reads and decode reads according to the content of the memory unit, thereby decoding a decoded information sequence corresponding to the symbol sequence. In this manner, memory space can be saved and the operating speed for traceback/decode reads need no acceleration. Thus, hardware cost and design complexity can be reduced simultaneously.
申请公布号 US7590928(B2) 申请公布日期 2009.09.15
申请号 US20060412580 申请日期 2006.04.27
申请人 REALTEK SEMICONDUCTOR CORP. 发明人 CHIANG JUNG TANG
分类号 H03M13/03 主分类号 H03M13/03
代理机构 代理人
主权项
地址