发明名称 MEMORY ACCESS CONTROL DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a memory access control device for executing memory readout at a high speed by reducing a processing waiting time during memory access of a microprocessor and a DMA master. SOLUTION: The memory access control device controls the memory access from the microprocessor and DMA master. The memory access control device includes an access arbitration means for arbitrating readout requests from the microprocessor and DMA master, and a command generation means for generating a command signal to be transmitted to a memory in accordance with an arbitration result of the access arbitration means. When the access arbitration means determines the readout requests are made simultaneously from the microprocessor and DMA master, the command generation means successively transmits a command signal for the microprocessor and a command signal for the DMA master to the memory in accordance with predetermined priority. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009205601(A) 申请公布日期 2009.09.10
申请号 JP20080049572 申请日期 2008.02.29
申请人 YOKOGAWA ELECTRIC CORP 发明人 KURONO MITSUHIRO;KOBAYASHI YOSHINORI
分类号 G06F13/28 主分类号 G06F13/28
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