| 摘要 |
A method for forming a capacitor of a semiconductor device is provided to shorten a manufacturing time by reducing a bunker defect in a dip-out process and a short phenomenon between a lower electrode oxide film patterns. An interlayer dielectric layer(12) with a contact plug(14) is formed on a semiconductor substrate(10). An etch stop layer(16), a lower electrode oxide layer(18), a floating nitride layer(20) and a stack layer of a hard mask layer are formed on the interlayer dielectric layer. The hard mask layer pattern including a first trench and a second trench with a small opening is formed by etching a hard mask layer(22). The first trench exposes the opening and the second trench covers the opening. A capping layer(28) is formed by reclaiming the first trench in a PE-TEOS oxide layer. The hard mask layer pattern is exposed by etching the capping layer.
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